A thin-film transistor (TFT) consists of a channel region located between source and drain (S/D) regions. The resistance of the channel is modulated by the voltage on the gate electrode, while that of the S/D regions is not. For a conventional metal-oxide (MO)TFT, metal is used to contact the S/D regions, forming Schottky barriers at the junction where the metal contacts the metal oxide in the S/D regions. The resistance associated with such a junction is high, resulting in lowering of the on-state current. Accordingly mechanisms to reduce the resistance of the S/D regions are desired.
In some aspects, high resistance associated with the Schottky barrier can be reduced if the resistivity of the metal oxide region under the metal coverage is decreased. Existing techniques for decreasing the resistivity of the S/D regions incorporate extrinsic dopants into the metal oxide of the S/D, conventionally including two steps. The dopants are first injected into the S/D regions and then activated by the heat-treatments to supply carriers. However, the activation annealing step not only reduces the S/D resistivity but also potentially generates defects in the channel and drives dopants to diffuse into the channel, shortening the effective channel length and possibly degrading the transistor characteristics.
The above-described deficiencies of conventional MOTFT devices are merely intended to provide an overview of some context relating to current technology, and are not intended to be exhaustive. Other information about the state of the art may become further apparent upon review of the following detailed description.